Computer systems and other electronic systems typically use buses for interconnecting integrated circuit components so that the integrated circuit components can communicate with one another. Prior buses typically connect masters such as microprocessors and controllers and slaves such as memories and bus transceivers.
Certain prior buses employ relatively large voltage swings. For example, one prior bus has rail to rail voltage swings between a high level voltage of 3.5 to 5 volts and a low level voltage of approximately zero volts.
One disadvantage of large voltage swing buses is the relatively high level of power dissipation. Another disadvantage of large voltage swing buses is the relatively high level of induced noise. The problems of high power dissipation and a high level of induced noise become ever more severe when buses are run at higher and higher frequencies.
Another typical disadvantage of large voltage swing buses is a speed limitation caused by the high slew rate of the bus driver.
Buses with relatively low rail-to-rail voltage swings have been developed to minimize power dissipation and noise, especially at high bus frequencies. Certain buses with low voltage swings also typically permit higher frequencies.
Each master and slave coupled to a prior bus typically includes output driver circuitry for driving signals onto the bus. Some prior bus systems have output drivers that use transistor-transistor logic ("TTL") circuitry. Other prior bus systems have output drivers that include emitter-coupled logical ("ECL") circuitry. Other output drivers use CMOS or N-channel metal oxide semiconductor ("NMOS") circuitry. Gunning transistor logic ("GTL") has also been used in other prior output drivers.
Many prior buses are driven by voltage level signals. It has become advantageous, however, to provide buses that are driven by a current mode output driver. One benefit to a current mode driver is a reduction of peak switching current. For a voltage mode driver the output transistor of the driver must be sized to drive the maximum specified current under worst case operating conditions. Under nominal conditions with less than maximum load, the current transient when the output is switched, but before it reaches the rail, can be very large. The current mode driver, on the other hand, draws a known current regardless of load and operating conditions. In addition, for a voltage mode driver impedance discontinuities occur when the driving device is characterized by a low output impedance when in a sending state. These discontinuities cause reflections which dictate extra bus settling time. Current mode drivers, however, are characterized by a high output impedance so that a signal propagating on the bus encounters no significant discontinuity in line impedance due to a driver in a sending state. Thus, reflections are typically avoided and the required bus settling time is decreased.
An example of a current mode bus is disclosed in U.S. Pat. No. 4,481,625, issued Nov. 6, 1984, entitled High Speed Data Bus System. An NMOS current mode driver for a low voltage swing bus is disclosed in PCT international patent application number PCT/US91/02590 filed Apr. 16, 1991, published Oct. 31, 1991, and entitled Integrated Circuit I/O Using a High Perforamnce Bus Interface.
One disadvantage of certain prior current mode drivers is that current sometimes varies from driver to driver. Variations can also happen over time. Temperature variations, process variations, and power supply variations sometimes cause such variations. Current variations in turn lead to voltage level variations on the bus. Bus voltage level variations can in turn lead to the erroneous reading of bus levels, which can reuslt in the loss of data or other errors. In addition, attempts to design around these variations by raising voltage levels sometimes leads to higher power dissipations, especially in extreme cases. In any event, variations in bus voltage levels are typically more problematic for buses with low voltage swings.
Certain prior feedback techniques have been used to control current. An article by H. Schumacher, J. Dikken, and E. Seevinck entitled CMOS Subnanosecond True-ECL output Buffer, J. Solid State Circuits, Vol. 25, No. 1, pages 150-54 (February 1990) includes a disclosure of the use of feedback.